Modern digital devices often include a tracing tool for collecting trace data while the device is being operated. The trace data may contain, for example, information about events occurring during operation of the device, information about states of the device assumed during operation of the device, information about states of peripheral devices, information about requests received by the digital device, and any other kind of information that may be useful for analysing the digital system and its operation. For example, a digital device may comprise a self-diagnosis tool for analysing the trace data, e.g. in response to a detected error or failure. Furthermore, a user or a developer may analyse the trace data, for example, after a failure of the digital device or in view of optimizing its performance. The trace data may also be referred to as, for example, debugging data, system log data, system history, event history, or simply trace.
The digital device typically generates the trace data at run time and collects it in a trace buffer. In other words, the trace data may be successively accumulated in the trace buffer during operation of the digital device. The trace buffer may be provided by any kind of suitable digital data storage device, for example, a flash memory, or a volatile or non-volatile random access memory (RAM).
In a typical scenario, a processor of the digital device has entered a stop mode after an operating failure, e.g. due to a software bug. A user may wish to analyse the trace accumulated in the trace buffer. The trace data therefore needs to be read from the trace buffer. The digital device may be operable to read out the trace data from the trace buffer. However, this may require resetting the digital device to an initial state, then restarting the processor. This may present a risk of overwriting at least part of the original trace data accumulated in the trace buffer prior to restarting the processor.
U.S. Pat. No. 7,594,139 B2 (Nellitheertha) describes a system and program storage device for extracting data of a buffer after a failure of an operating system. The method involves registering an application prior to the failure and rebooting the system.
Many digital devices comprise a debugging interface for enabling a host device to read data from and write data to the digital device via the debugging interface while the processor of the digital device may be in a stop state. A widely used debugging method is based on the standard test access port and boundary-scan architecture developed by the joint test action group (JTAG) and is generally known as JTAG. Unfortunately, JTAG can have a data rate (number of transferred bits per second) that may be considerably lower than compared to methods in which the digital device itself reads out the trace buffer. Depending on the size of the trace collected in the trace buffer (in many cases, more than 100 megabytes), this can be a significant drawback.